The parasitic capacitance between the gate and drain and between the gate and source can significantly affect the efficiency of GaN-based High Electron Mobility Transistors (HEMT), especially at high frequencies. A key determinant of the capacitance of the gate to the drain, source and body is the thickness and dielectric constant of passivation materials in the gate to drain and gate to source regions. A passivation material layer with a lower dielectric constant will have lower gate to drain and gate to source capacitances.
The past several years have seen remarkable improvement in GaN-based High Electron Mobility Transistor (HEMT) technology. Much of this is due to improvements in material growth, device design and device fabrication. Despite significant improvements in power added efficiencies, it is becoming increasingly clear that GaN HEMTs designed for RF, microwave, millimeter wave, and power switching applications are severely limited by the ability to dissipate heat and thus must run at significantly reduced power levels, pulse length and duty cycle.
Recent thermal simulations indicate that the substrate is not the primary source of the thermal impedance, rather it is the ability of the III-nitride semiconductor material layers to locally spread the heat to the surrounding material and substrate due to the extraordinarily high power dissipation density in the near-channel device region (estimated at many megawatts) and the strong reduction in thermal conductivity with increasing temperature. Integrating the capability to locally spread the thermal power dissipated near the channel will have a large impact on overall device performance and allow significant total power output improvements.
Past methods to implement thermal management by depositing diamond on electronic devices resulted in additional adverse capacitance. For example, as described in U.S. Pat. No. 8,039,301 to Kub et al., “Gate After Diamond Transistor,” the insulating diamond is positioned between the gate and the drain of a AlGaN/GaN High Electron Mobility Transistor (herein called a HEMT) to extract heat from the high power density area located adjacent to the gate. The diamond material has a dielectric constant of approximately 6 which, while low, results in an additional capacitive coupling between the gate and the drain resulting a loss of gain at high frequencies. See also U.S. Pat. No. 9,159,641 to Hobart et al., “Nanocrystalline diamond three-dimensional films in patterned semiconductor substrates”; U.S. Pat. No. 9,246,305 to Kub et al., “Light-emitting devices with integrated diamond”; U.S. Pat. No. 9,305,858 to Hobart et al., “Nanocrystalline diamond three-dimensional films in patterned semiconductor substrates”; U.S. Pat. No. 9,331,163 to Koehler et al., “Transistor with Diamond Gate”; and U.S. Pat. No. 9,466,684 to Koehler et al., “Transistor with Diamond Gate.”
This problem becomes significantly more acute for very high frequency devices (transistors) because the gate-to-drain spacing is scaled down to achieve high transit time. However, simultaneously, the gate-to-drain capacitive coupling increases. Inserting a high dielectric constant material between the gate and drain in these highly scaled devices only increases the capacitive coupling resulting in loss of gain at high frequencies.